A Deep Neural Network for Image Classification Using Mixed Analog and Digital Infrastructure

Recently, Deep Learning (DL) methods are a well-known solution for image and object detection in computer vision applications. The software-based implementation of DL algorithms requires huge resources and consumes more power. To overcome these challenges, a hardware implementation of Deep Neural Network (DNN) using the integrated analog–digital architecture was proposed in this article. The Very Large-Scale Integration (VLSI)-based DNN implementation utilizes Pulse-Width Modulation (PWM), and analog–digital circuits. The integration of analog and digital architecture integrates the benefits of both circuits, which reduces power consumption and enhances processing speed and classification accuracy. The fabrication of the VLSI chip includes the DNN neuron circuit, PWM circuit, digital adders-subtracters, and SRAM memory. The experimental result verifies that the presented DNN VLSI architecture reduces the power consumption of the neural system, and enhances the image classification performance.