Tachyon: A Programmable Optoelectronic Hardware Accelerator for Ultrafast Tensor Arithmetic

We discuss the design and implementation of Tachyon, a high-speed, scalable optical hardware accelerator. In addition, we go over programming the accelerator with an instruction set architecture (ISA) capable of efficiently communicating with on-chip optical components to perform ultrafast \(\mathcal {O}(1)\) matrix-vector multiplication (MVM). We first introduce the optoelectronic accelerator’s computing scheme. We then go over our pipeline for programming the accelerator and introduce our optical ISA. Our results show that the accelerator’s optical core is scalable and can perform an MVM in a single pass with a performance per watt (PPW) clocked 3 orders of magnitude higher than Google’s Tensor Processing Unit. The core is rated at 7 TFLOPS and 245 TFLOPS/W for a \(4 \times 4\) matrix tile, but scales to 478 TFLOPS and 261 TFLOPS/W for a \(256 \times 256\) .