Bitstream Configuration

This chapter will introduce the final step of FPGA application design EDA–bitstream configuration, including bitstream generation, compression, encryption, and programming. Bitstream is the bottom level machine code that actually makes FPGA work, after all the efforts made by previous EDA engines are assembled in this image by the bitstream generator, it will be downloaded into the FPGA by the bitstream programmer. However, modern FPGA technology also introduced challenges, such as the excessive growth of the file size and stealthy attack threats against the programming system. Bitstream compression and encryption is thereby rise to the challenges.