Design and Implementation of Adders and Multipliers for DSP Applications
摘要
Adders and multipliers are the most fundamental components of a Digital Signal Processing (DSP). The design and implementation of several adders and multipliers for DSP applications were proposed in this study. Increasing the speed of those activities enhances the overall performance of the system. The purpose of this study is to speed up addition and multiplication processes while consuming less power and energy. Low-power, high-speed multipliers and adders are necessary for high-speed DSP. As a result, meticulous design optimization is required. In this study, various adders and multipliers are constructed for analysis of different parameters. Each Adder and Multiplier has its own set of advantages and disadvantages in terms of speed, power, energy, and area. The design of suggested adders and multipliers are performed using verilog tool. Then, using Xilinx Vivado 2019.1 for Artix-7 family, they are simulated and synthesised. We concluded the best performance of different Adders and multipliers in different parameters based on the analysis of results.