A Comprehensive Review and Performance Analysis of Different 7T and 9T SRAM Bit Cells

In the given paper, the performance and durability of two 9T SRAM cells, namely 9T-1 and 9T-2 with two 7T SRAM cells, namely 7T-1 and 7T-2 are examined and then contrasted against one another. The outcome is presented by checking the results of the—static margins (write, hold, read) and leakage current analysis. All the cells are simulated with a 90-nm technology node and every simulation is performed with 1 V constant power supply at 27 °C. The best hold static noise margin is obtained for SRAM 7T-1 cells with the value 0.466 V. The best performing read static noise margin is of the 9T-1 cell which is calculated as 0.414 V. In order to find out the variation in performance of the bit cells with varying temperatures, the static noise margin is also calculated in a range from −10 to 110 °C. The best variance in hold mode comes out to be 0.17 mV/°C for 9T-2 cell and in read mode to be 0.05 mV/°C for the 7T-2 cell. Write margin value for the 9T-2 cell is the highest at 0.991 V, while the other cells range from 0.365 to 0.604 V. The temperature variance was worst in write margin for the 9T-1 cell with 0.827 mV/°C, while the other cells performed relatively better. Finally the leakage current of the above given cells is also analyzed and the least leakage is found to be present in the 7T-2 cell at 0.0262 nA.