Method for Minimizing Static Current Consumption of Single Class Nonlinear Input Stages of Micro-power High-Speed Operational Amplifiers
摘要
The authors consider circuit design methods for designing class “AB” input differential stages (DSs) with local resistive negative feedback on a common-mode signal, characterized by an increased ratio of the maximum output current of the DS (Iout.max) to the output current in static mode (Iout.0). The DS circuits suggested in the article are designed to operate in micro-power high-speed operational amplifiers (Op-Amps) that use BJTs or CMOSs, as well as in continuous compensation stabilizers in circuits for suppressing output voltage surges and dips. The quality of the DS with a current (high-resistance) output is suggested to be evaluated by the current efficiency factor, which is defined as the ratio of Iout.max to Iout.0. The simulation results of CMOS Op-Amp in XFab with the class “AB” input stage suggested in the article, which provides maximum slew rate of more than 800 V/μs, are presented.