Advanced Tunnel Field Effect Transistors

The first fabrication of complementary metal-oxide semiconductor (CMOS) was done in the 1960s. Since then, 60 decades have passed, but the CMOS technology stands still owing to its monetary benefits and fabrication simplicity. The continuous downscaling of metal-oxide semiconductor field effect transistors (MOSFET) devices results in short channel effects deviating the technology from well-known Moore’s law. Moreover, the subthreshold swing (SS) limitation (Boltzmann’s Tyranny) and need for more power efficiency are major challenges for the current metal oxide semiconductor (MOS) technology and it might become the cause of end of the MOS technology. Due to more power requirements in near future, the international road map for devices and systems (IRDS) suggests that SS of devices need to be reduced around 40 mV/dec, which is impossible to achieve with current MOSFET technology. So, the researchers are focusing on new technologies that possibly replace MOSFETs. The subthreshold swing (SS) can be reduced below 60 mV/dec using tunnel field effect transistors (TFETs), negative capacitance field effect transistors (NCFETs), feedback FETs, and impact ionization FETs. Steeper SS devices incorporate more energy-efficient switching. The devices based on band-to-band tunneling phenomenon are known as TFET. The high doping profile is used to incorporate band-to-band tunneling phenomenon in TFET devices. The Ion/Ioff ratio obtained by TFET is better compared to MOSFETs, but the Ion is less in TFETs. Like any other technology, TFET has various shortcomings that need to be fixed, such as the low on-state current, complicated and costly fabrication process, random doping fluctuations (RDFs), asymmetric operation between source and drain. Various TFET configurations like heterojunction TFET, L- and U-shaped structure, vertical TFET, pocket doping-based TFET, doping less TFET (DL-TFET), negative capacitance TFET (NC-TFET) and junction-less TFET (JL-TFET), line TFET, electron-hole bilayer TFET that can be employed to overcome all these shortcomings are discussed in this chapter. The hetero-integration of III–V material on silicon substrate, vertical structure, and pocket doping techniques can be used to achieve better the Ion/Ioff ratio. DL-TFET and JL-TFET can reduce the RDF, fabrication cost, and complexity. Integration of negative capacitance effect in TFET can be employed to achieve a much steeper subthreshold swing. This chapter mainly focuses on different types of advanced TFETs structures, their characteristics, and their applications as well.