Design of Common-Drain CMOS Power Amplifier for LTE Applications

Recent standards of wireless communication like Long-Term Evolution (LTE) use non-constant envelope signals as an input and some modulation schemes to achieve high bit rates, which induces the peak-to-average power ratio (PAPR). This makes the requirement of an efficient power amplifiers for the whole range of input power signal. Power amplifiers convert low radio frequency (RF) power signal into high power signal. This is used to improve the signal strength before passing through the transmitting antenna. A fully integrated high-efficient common-drain complementary metal-oxide-semiconductor (CD-CMOS) power amplifier is proposed to operate at the frequency of 1.85 GHz in LTE band 2, which supports frequency division duplexing (FDD) and mainly used for temperature and power monitoring. This power amplifier uses 3.3 V as supply voltage with Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm CMOS technology. The proposed power amplifier is designed by using Agilent Advanced Design Systems (ADS) tool. It achieves 45.084% efficiency for common-drain CMOS power amplifier. Further, this efficiency is improved by using envelope tracking technique, which achieves 62.629% efficiency at 1.85 GHz with low power consumption. This proves that the proposed envelope tracked power amplifier can be suited for LTE mobile applications or wireless handheld devices.