Contact Engineering for Contact Resistance Minimization of Conventional, III-V, and 2D FETs

Due to ever-shrinking channel lengths of FETs, typical advanced fabrication techniques employed for source and drain junction or contact formation make the contact resistance and contact resistivity issue a very important factor for theoretical modeling and experimental precise extraction. Contact resistances are also important for probe based current measurement where probe contact resolution depends on the contact resistances of source and drain junctions. When contact resistances become larger than a few factors of the order of Rch or channel resistances which can be very low for ballistic FETs, the maximum achievable drive current decreases at actual measurement point at probe station different from advanced device and transport based modeling values. This chapter therefore investigates the physics of metal-semiconductor interface for contact resistance minimization and identifies key limiting intrinsic interfacial physics based factors for lower contact resistance measurements. Metals and their alloys and other methods are reported for conventional, III-V, and 2D FETs. Atomic layer growth or deposition (ALD) technique of metal alloy formation, particularly for 2D materials, and laser or flash annealing for minimizing defect induced gap states can decrease the contact resistances of these different FETs.