Negative Time Interval Measurement Using CMOS Standard Cell-Based Vernier TDC Channel

Vernier technique for time interval measurement between two events has gained attention due to its features of high resolution, large dynamic range and area efficiency. This paper presents negative time interval measurement between 'start' and 'stop' events using Vernier technique as its novel feature. Utilizing this feature, a CMOS standard cell-based TDC channel is designed, suitable for both positive and negative time interval measurements between ‘start’ and ‘multi-hit stop’ signal. This TDC channel measures timing of four hits comprised in multi-hit signal with respect to start with LSB of 98 ps over 14 µs dynamic range, 1 ns of double hit resolution, 0.3 LSB DNL error and 0.5 LSB INL error on typical process corner using 0.35 µm CMOS technology.