Verification of AHB2APB Bridge Protocol Using UVM

It is vital to update tools and methodologies in pace with technological innovation in order to handle the problems posed by the changing verification environment. The authors propose a verification of AHB2 APB bridge protocol using Universal Verification Methodology (UVM). It is the intention of this study to discuss the benefits of using the Universal Verification Methodology for AHB2APB verification. This work focuses on creating a standard AHB2APB Bridge protocol architecture that is efficient and on enhancing the authentication environment utilizing a System Verilog UVM implementation. An automated authentication platform developed by UVM will produce an AHB2APB Bridge debugging test for any given DUT. UVM-based performance verification adds randomized test scenarios to ensure high-performance by covering all potential cases. On the other hand, Verilog cannot be used to examine the active cover model in a typical verification location. System Verilog is used for coding, while Questasim is the simulation tool of choice. The code coverage for RTL design is acquired, and 98.81 percent of the code coverage and 100 percent of the functional coverage are recovered.