Design of PASTA-Based Hybrid ARPS Algorithm for Low Power Applications Using Motion Estimation Algorithm

The research offers a parallel self-timed adder (PASTA) technique-based, efficient motion estimation (ME) VLSI design. By utilising and minimising time losses in a video series between neighbouring pixels, the block-based suggested technique plays a crucial part in visual protocols. One of the most popular quick techniques for rotation estimations that uses only a minimal amount of hardware resources and does not slow down real-time HD video transmission is adaptive root pattern search (ARPS). The recommended architecture solely makes use of spatial similarities. Furthermore, Hybrid ARPS will be created by integrating PASTA into the ARP module. This paper's main goal is to create the HARPS hybrid method and the ARPS movement estimate algorithm by analysing the delay. Utilising an Altera Cyclone III EP3C55F484C6 and the Xilinx Vivado tool, the proposed design is put into practice. Comparing the proposed design to the existing designs, the new design uses 10% less power and 15% less area.