Hardware Simulations of Spiking Neural P Systems

This chapter is dedicated to the hardware used in simulating SNP systems and their variants. Specifically, the main focus is on two of the most common types of parallel hardware for simulation: field-programmable gate arrays (in short, FPGAs) and graphics processing units (in short, GPUs). Hardware simulators mainly refer to the use of processing units besides the central processing unit (in short, CPU). FPGAs and GPUs are used as co-processors of CPUs: They are also known as accelerators referring to the fact that they are used to speed up computations not suited for CPUs. Both FPGAs and GPUs allow increased parallelism not found in CPUs: the former are lower power and programmable circuits, while the latter allow easy execution of thousands of threads. From this overview, it is not difficult to see how SNP systems are natural targets for implementations in such parallel hardware. Starting from the basics of such hardware, their representations, programming and optimisations for implementing SNP systems are discussed. Applications of both hardware simulators are provided, highlighting the benefits gained from such hardware as well as current challenges in the implementations. The chapter ends by outlining ideas for further simulations of SNP systems and variants on hardware.