Side Channel Analysis and Hardware Implementation of AES CBC Algorithm on Artix A7 FPGA Development Boards

The increasing importance for data security makes the implementation of encryption methods on platforms with limited resources imperative. The Advanced Encryption Standard (AES) is a popular protocol for sending data securely since it provides different key sizes for different security levels. The implementation of AES Cipher Block Chaining (CBC) with a 128-bit key on systems with limited resources-the Artix A7 FPGA DEVELOPMENT BOARD is the subject of a case study presented in this paper. We ensure efficient encryption while addressing the issues of constrained resources, such as computing power and memory.Our implementation relies on performance optimization within these platforms’ limits.Our study’s findings provide information on how to implement AES CBC 128 on platforms with limited resources, allowing for safe communication in low-processor scenarios.