In this paper, an optimize the electrical characteristics of the Double Gate-Metal Oxide Semiconductor Field Effect Transistor (DG-MOSFET) is endeavored by Cat Swarm Optimization (CSO) algorithm for its integration into CMOS logic. The Cat Swarm Optimization (CSO) algorithm is employed for optimization. It addresses the multi-objective optimization challenge, formulating a cost function that encompasses critical electrical parameters, including subthreshold swing, OFF-state current, output conductance, threshold voltage roll-off, and transconductance. The main object is to concurrently improve subthreshold and saturation parameters, elevating MOSFET performance. The proposed design demonstrates an enhancement in the performance of voltage gain and cut-off frequency compared to existing works, marking a notable improvement in the field.