Fault simulation of nonlinear analog circuits is usually done as DC or time domain simulation. In that, the crucial difference with linear circuits is in the property that due to the nonlinearity of the circuit elements the fault, even a soft (parametric) one, may disturb the DC regime so creating difference between the responses of the fault-free and the faulty circuit and among the faulty circuits representing different faults at any time instant. In this chapter, being aware of this property, algorithms are described that attempt to reduce the time needed for repetitive simulation of the faulty circuits based on similarity of the circuit structure and similarity of the responses in some period of time.