In this paper a grounded negative fractional order inductor has been implemented using CDBA (current differencing buffered amplifier) and a fractional order capacitor. Realization of CDBA is done using CFOA (current feedback operational amplifier). The suggested CDBA offers accurate voltage and current gains, for simulation of CDBA using CFOA a macro model of commercially available IC AD844 has been used. The fractional order capacitor of value 1uF and order 0.5 is realized using CFE (continued fraction expansion) method. It has been demonstrated that fractional-order circuits have various properties that integer-order circuits find challenging to attain, such as a greater degree of design freedom. Additionally, as the order of the fractional order system (FOS) is increased, the system accuracy grows. One of the major uses of negative inductance is cancellation of parasitic inductance which has become a growing issue in high speed or low power integrated circuits. Another application for negative inductance is in microwave circuits for impedance matching. The proposed fractional negative inductor was simulated using LTspice for the single instance of value 1 H and order 0.5. The fractional inductance cancellation circuit has been used to demonstrate the performance of the proposed negative fractional inductance circuit.