Contrasting Approaches for Vedic Multiplication Using Xilinx ISE and Cadence

Vedic Mathematics is an ancient Indian Mathematics Technique which provides the unique and faster way of performing monotonous mathematical calculations based on 16 Sutras (or Formulas). Vedic Multiplication is one such technique which is based on the 14th Sutra, i.e., Urdhva Tiryakbhyam. It involves multiplication of bits vertically and crosswise. This paper studies two approaches—Algorithmic & Block Diagram Approach built with Verilog HDL which implemented the Vedic multiplication algorithm and their speed, power, and area analysis on the two different platforms—Xilinx ISE and Cadence Tools. The paper reflects on their comparison based on different parameters provided by the tools.