Network on Chip (NoC) performance degradation is significantly impacted by network congestion. Routers using adaptive algorithms, which are capable of detecting traffic congestion, can enable NoC to support complex and dynamic applications. Additionally, there is a growing need in NoC for routing algorithms that can be modified to provide minimal paths and congestion monitoring. The proposed high-speed odd-even congestion-aware routing algorithm for NoC architecture is based on the odd-even turn model and regional congestion awareness. In terms of delay and throughput, the suggested technique performs better than the current algorithm.

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High-Speed Congestion Aware Routing Algorithm for Network on Chip Architecture

  • Bellala Navyasri,
  • Sankurathri Shreyaswi,
  • Veerendra Sai Manasali,
  • M. Vinodhini

摘要

Network on Chip (NoC) performance degradation is significantly impacted by network congestion. Routers using adaptive algorithms, which are capable of detecting traffic congestion, can enable NoC to support complex and dynamic applications. Additionally, there is a growing need in NoC for routing algorithms that can be modified to provide minimal paths and congestion monitoring. The proposed high-speed odd-even congestion-aware routing algorithm for NoC architecture is based on the odd-even turn model and regional congestion awareness. In terms of delay and throughput, the suggested technique performs better than the current algorithm.