Current-Sensing ADC with Power Consumption of 57 nW and FoM of 336 fJ/Conversion at 28 nm CMOS Technology
摘要
Neuron-based analog-to-digital converters (ADC) have proved to be very useful for many low-power applications. The choice of neuron and the architecture of ADC both play very important roles, especially for low-power, low-current sensing scenarios. In this paper, a novel neuron architecture based on the Leaky & Integrate Fire (LIF) model is proposed to realize a low-power, low-current sensing ADC with power scalability. ADC works for input signal ranging from 2 µA to 5 µA with scalable power supply ranging from 0.9 V to 0.5 V. The design is implemented in 28 nm technology CMOS process of UMC. The total power consumption of the circuit is found to be 57 nW and achieves FoM of 336 fJ/conversion for 7 bits of operation with a power supply of 0.5 V. The proposed design has the lowest power consumption and FoM among the reported current mode and neuromorphic ADCs.