Hardware Implementation of SM4 Encryption Algorithm with Hybrid Stochastic Computing

Hybrid stochastic computing (HSC) combines binary number and stochastic number that uses the expectations of multibit streams to achieve stochastic computing (SC). In this paper, SM4 algorithm circuit is designed using HSC. An arithmetic expression about HSC and ADD operation in the Galois field \(\text{GF}({2}^{3})\) is derived and implemented with HSC-XOR (exclusive-or) instead of regular XOR operations in SM4. We designed SM4 hardware circuit based on HSC-XOR circuit to realize the encryption function of SM4 algorithm. The result of SM4 hardware with HSC indicates that SC breaks through the existing application scenarios and is available for cryptographic chip design. The experiments illustrate that the determinate computing of HSC is verified by SM4 encryption hardware.