High-Speed Energy-Efficient Canny-Edge Detector Using Novel Approximate Adder
摘要
Modern portable devices require high speed and high energy efficiency. Approximate computing allows trade-off accuracy for high computational speed and less on-chip area. Such techniques have garnered significant attention in recent times as they can be used in several error-tolerant applications. Even though many approximate adders have been proposed in the past, they can still be improved further. In this paper, we propose a new approximate adder that utilizes a carry prediction method. This allows parallel propagation of carry which results in faster calculations. Our proposed design showcases results that are 46.25% faster than the conventional RCA. The proposed adder is area-efficient and shows tremendous improvement in accuracy. Furthermore, our adder shows higher image quality in digital image processing than other approximate adders while taking similar hardware costs.