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In the electronics market, the demand of high-speed memory devices like Universal Flash Storage (UFS) has increased drastically due to their minimal latency compared to other technologies. The recent UFS 4. requires newly introduced Mobile Industry Processor Interface (MIPI) UniPro 2.0 as an application layer. UFS and Unified Protocol (UniPro) have been adapting themselves to meet the growing demands with multiple modifications to the protocol, thereby creating multiple challenges for Design Verification (DV) engineers to complete verification within the stipulated time. The purpose of this paper is to categorize the challenges faced throughout the verification of UniPro 2.0 protocol and the approaches to overcome those using a systematic configurable System Verilog-Universal Verification Methodology (SV-UVM) based framework with Perl script integration for quick coverage closure.

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A Walkthrough of Reconfigurable SV-UVM-Based MIPI Standard UniPro2.0 IP DV Test Bench: Challenges and Approaches

  • 会议论文

  • 发表日期：

    2025年

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  • Piyush Tankwal,
  • Arnab Ghosh,
  • Piyush Agnihotri,
  • Mukesh Gandhi,
  • Parag S. Lonkar

摘要

In the electronics market, the demand of high-speed memory devices like Universal Flash Storage (UFS) has increased drastically due to their minimal latency compared to other technologies. The recent UFS 4. requires newly introduced Mobile Industry Processor Interface (MIPI) UniPro 2.0 as an application layer. UFS and Unified Protocol (UniPro) have been adapting themselves to meet the growing demands with multiple modifications to the protocol, thereby creating multiple challenges for Design Verification (DV) engineers to complete verification within the stipulated time. The purpose of this paper is to categorize the challenges faced throughout the verification of UniPro 2.0 protocol and the approaches to overcome those using a systematic configurable System Verilog-Universal Verification Methodology (SV-UVM) based framework with Perl script integration for quick coverage closure.