Design Step for Op Amp Based CMOS Feedback Amplifiers

This paper presents the design step for op amp based CMOS feedback amplifiers. The proposed design step follows the design strategy in which the closed-loop gain and bandwidth of the amplifier are the performance parameters to be satisfied, not op amp’s opened-loop phase margin and unity-gain frequency, as traditionally carried out. To demonstrate, the feedback amplifiers were designed for a gain bandwidth (GBW) of 20 MHz and a quality factor (Q) of 0.707. Simulations using 0.35 µm CMOS technology with a 3-V power supply for the feedback amplifiers, obtained from the proposed design steps, show a consumption of significantly less power (45.42%) than those obtained from the traditional design method, while other performance parameters remained comparable.