Effect of High-Low Doping Profile on Threshold Voltage Shift of Submicron Double-Gate MOSFET

Threshold voltage shift as a function of channel length for shallow implanted doping in source region is analytically investigated for double-gate MOSFET structure. Both low and high-K dielectrics are considered for evaluating the magnitude of shift, and high-low asymmetric doping profile is considered for computing magnitude of shift after solving of Poisson’s equation under inversion condition. Effect of flat band voltage, substrate doping density, depletion region width, dielectric thickness, and substrate bias effect are investigated for computing the shift, where significant reduction is achieved for high-K dielectric as well as for lowering oxide thickness. Optimized dimensions and biasing conditions may be estimated from the simulation profiles, which are requirements for specific applications, when the device will be implemented in analog circuit for making an amplifier. Simulated findings exhibit significant improvement contrary to the published results for constant doping profile.