Optimizing GNN Inference Processing on Very Long Vector Processor

Graph Neural Network (GNN) has shown great success in graph learning. However, within the complexity of the real-world tasks and the big graph datasets, current GNN models become increasingly bigger and more complicated to enhance learning ability and prediction accuracy, which poses a huge challenge to the computation of GNN. The accelerated optimization work for GNN mainly focuses on typical architecture, such as GPU and CPU, with relatively little research on other architectures. In this paper, we focus on accelerating the GNN inference on a very long vector processor. There are several problems in deploying GNN models effectively on long vector architectur, including the lack of an efficient library for GNN on long vector architecture, the very low memory access bandwidth of DDR, and the heterogeneous scheduling issues. To address these challenges, we proposed several strategies to accelerate GNN inference on long vector architecture. Specifically, we build an efficient GNN operator library targeting on the long vector architecture. Secondly, we designed an operator fusion strategy to improve on-chip memory utilization and alleviate the pressure of off-chip memory access. Finally, we implemented a heterogeneous multi-threaded scheduling strategy for long vector architecture to eliminate the overhead of kernel launch. The experimental results show that compared to DGL on Phytium 2000+, the proposed GNN inference on a very long vector processor achieve up to 6.47x speedups.