Integration of BIST Module for Error Bit Detection in SPI Protocol

This paper presents the development of a Serial Peripheral Interface (SPI) module with Built-In Self-Test (BIST) capabilities that can accurately locate error bits during the transmission. In the literature, the implementation of SPI protocol or BIST functionalities or SPI modules with BIST without identifying the specific location of errors are done. Even with single bit error in the SPI protocol requires the complete replacement of the circuit, resulting in a significant increase in cost and effort associated with the maintenance of the system. This design overcomes this limitation and offers a more comprehensive solution by bit-bit comparison. Xilinx Vivado tool is used to simulate the proposed design, which is written in Verilog HDL. The proposed design provides a valuable tool for debugging and verifying the functionality of SPI-based systems, especially in safety-critical applications where error detection is vital.