Design and Implementation of Five Port Label Switched NoC Router Using FPGA

Network on Chip (NoC) is a contemporary signaling method that enhances the efficiency of interconnections, design, and testing processes within current System on Chip architectures. Routers provide streamlined routing with minimal complexity and exceptional performance, contributing to effective global on-chip communication. In a multiprocessor system with resource-constrained processes, streaming applications seek strict bandwidth and throughput guarantees. Label Switching Network on Chip (LS-NoC) is used that offers bandwidth reservation which drives the throughput assurances. Traffic is engineered to Quality of Service (QoS) guaranteed routes using a centralized LS-NoC Management architecture. The existing NoC Manager is modified to improve throughput. Area utilization and power consumption are to be minimized to have a good design. Xilinx Vivado Design Suite is used to model the design in Verilog HDL. The implemented router design is realized on Artix-7, and an assessment of resource utilization and power consumption is conducted for the five port router. In comparison to the other router architecture, synthesis reveals that 29% of less registers are used and a power reduction of 28% that is 12.08 mW is observed.