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As the complexity of integrated circuit (IC) design increases and its manufacture globalizes, IC designers are increasingly adopting third-party intellectual property (IP) cores to reduce costs and expedite development. However, this shift heightens security risks, particularly the threat of Hardware Trojan (HT). Traditional HT detection methods based on neural network are focused on digital circuits, thus not applicable to analog circuits. To bridge this gap, we introduce GAT-Trans, a Graph Attention Network (GAT) model tailored for detecting analog hardware Trojans, such as A2 Trojan, at the transistor level. Since GAT model enhances weights for critical neighboring nodes, GAT-Trans can improve the detection performance of potential HTs embedded within analog circuits. In the paper, we assess the influence of various node definition methods on detection efficacy and innovate a graph construction method that treats ports of one transistor as a node. We systematically explore different feature extraction methods from analog circuits and evaluate model performance across different feature combinations. This paper details GAT-Trans and proves its effectiveness in identifying A2 Trojan, offering a novel security tool for analog circuits and enhancing defenses against advanced hardware threats.

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GAT-Trans: Graph Attention Networks for Analog Hardware Trojan Detection at Transistor Level

  • 会议论文

  • 发表日期：

    2025年

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  • Jialong Song,
  • Jianming Zhang,
  • Xing Hu,
  • Yang Zhang,
  • Jiayu He,
  • Jinhui Tan,
  • Shaoqing Li

摘要

As the complexity of integrated circuit (IC) design increases and its manufacture globalizes, IC designers are increasingly adopting third-party intellectual property (IP) cores to reduce costs and expedite development. However, this shift heightens security risks, particularly the threat of Hardware Trojan (HT). Traditional HT detection methods based on neural network are focused on digital circuits, thus not applicable to analog circuits. To bridge this gap, we introduce GAT-Trans, a Graph Attention Network (GAT) model tailored for detecting analog hardware Trojans, such as A2 Trojan, at the transistor level. Since GAT model enhances weights for critical neighboring nodes, GAT-Trans can improve the detection performance of potential HTs embedded within analog circuits. In the paper, we assess the influence of various node definition methods on detection efficacy and innovate a graph construction method that treats ports of one transistor as a node. We systematically explore different feature extraction methods from analog circuits and evaluate model performance across different feature combinations. This paper details GAT-Trans and proves its effectiveness in identifying A2 Trojan, offering a novel security tool for analog circuits and enhancing defenses against advanced hardware threats.