A sparse particle swarm optimization (SPSO)-based QMF bank with a new objective function has been proposed in this paper. The weighted sum of the restrained ripples in the passband and stopband, error in the transition band, ripple measure, and departure from the ideal reconstruction condition are all included in the modified proposed objective function. The proposed strategy performs better than the latest techniques found in the literature. For the QMF bank, an efficient architecture based on the radix-2r with carry save adder (CSA) tree is proposed. A comparative analysis of different versions of the proposed architecture by varying r is also performed. The ASIC implementation of the developed architecture utilizing a 45-nm NanGate open cell library is performed, and area, power, and delay results are presented. The proposed architecture is also implemented on an FPGA board, called Basys-3 (Artix-7, XC7A35T-1CPG236C). For the intended FPGA board, several crucial performance parameters are estimated for various filter orders, including the number of slices, slice LUTs, maximum clock frequency, and dynamic power consumption. The proposed architecture for the prototype FIR filter provides an average improvement of 43.40% in (area-delay product) ADP and 79.68% in (area-power product) APP for ASIC implementation.