Wireless security and privacy protection are key issues that cannot be ignored in the development of information technology. A variety of security protocols have been developed and implemented to enhance wireless security. Elliptic Curve Digital Signature Algorithm (ECDSA) is one of the most widely used methods for blockchain-based security protocols. In the ECDSA digital signature verification algorithm, elliptic curve calculation over a finite domain is the key factor affecting its performance. This paper proposed an efficient Field-Programmable Gate Array (FPGA) accelerator design for ECDSA signature verification, the hardware design and memory access mode of modular multiplication are optimized. Our design works at 200 MHz frequency and can achieve a latency of 374 \(\upmu \) s, which is, to the best of our knowledge, about 34% faster than state-of-the-art data center platform based FPGA implementation. A throughput of 20,967 verifications per second can be achieved with 8 compute units (CUs), and a linear acceleration ratio can also be achieved.