This research presents a novel, low-power, fully analog integrated circuit for classifying fetal health data. The circuit leverages a centroid-based approach, employing Vector Length calculations and current comparisons. Notably, it achieves high classification accuracy \((93.8\%)\) while consuming only 675 nW. This design prioritizes energy efficiency by operating transistors in the sub-threshold region while maintaining robustness. To validate its effectiveness, the proposed circuit is compared against existing software and hardware-based classifiers. Python programming language was used to train the classification model and process the resulting data. The design and simulations were conducted within the Cadence IC Suite environment, utilizing the TSMC 90nm CMOS process technology.