Very Large Scale Integration (VLSI) algorithms play a crucial role in Semiconductor Technology. With the advancements in the field of VLSI technology, all kinds of electronic equipment have improved their performance in all aspects that span from the design basic to the reliability enhancements. In this paper, hardware efficient techniques are used for the realization of digital filter banks for auditory compensation. Auditory compensation is the heart of a digital hearing aid and filter banks are employed to split incoming audio signals into various frequency bands. To divide the audio spectrum, non uniform filter banks are preferred over uniform filter banks as they align more precisely with human ear’s frequency resolution. Octave and fractional interpolated filter banks are used for creating non uniform filter banks. The key idea of this work is to replace the multipliers in these filter banks with more efficient multipliers which use VLSI algorithms like shift and add and vedic. The performance of these schemes are compared in terms of utilization and power and a remarkable improvement is achieved.