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This paper focuses on a new algorithm of LSB embedding technique without Multiplier and Divider considering 8-bit binary bitwise operation for each RGB channels with its software along with hardware implementation. For the software implementation the performance quality metrics considered are PSNR and MSE. The result of both MSE and PSNR as compared with the recent research articles shows improvement of 92.78% in MSE and 1.66% in PSNR. In hardware implementation the prototype design using Xilinx–AMD for xc7vx485tffg1157-1 device FPGA is considered where area (top level module has 18 cells, numbers of I/O utilization (2% of total resources) and power (2.307 W) maintaining the security aspect of the proposed work for LSB embedding.

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FPGA Implementation of LSB Steganography Without Multiplier and Divider

  • 会议论文

  • 发表日期：

    2025年

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  • Poulomi Ghosh,
  • Sudip Ghosh,
  • Hafizur Rahaman

摘要

This paper focuses on a new algorithm of LSB embedding technique without Multiplier and Divider considering 8-bit binary bitwise operation for each RGB channels with its software along with hardware implementation. For the software implementation the performance quality metrics considered are PSNR and MSE. The result of both MSE and PSNR as compared with the recent research articles shows improvement of 92.78% in MSE and 1.66% in PSNR. In hardware implementation the prototype design using Xilinx–AMD for xc7vx485tffg1157-1 device FPGA is considered where area (top level module has 18 cells, numbers of I/O utilization (2% of total resources) and power (2.307 W) maintaining the security aspect of the proposed work for LSB embedding.