This paper presents the design and implementation of a 32-bit RISC-V processor capable of executing fundamental arithmetic and logic operations. The processor includes an Arithmetic and Logic Unit (ALU), a register file, an Instruction Fetch Unit (IFU), and a control unit that generates control signals based on decoded opcode, funct7, and funct3 fields. The ALU performs essential operations, while the register file supplies operands and stores results. The processor executes core R-type instructions, facilitating real-time processing with zero-flag indication for conditional operations. The design was verified using Xilinx Vivado simulations, confirming its functionality. This work demonstrates a practical RISC-V processor design, contributing valuable insights for embedded systems development and educational purposes.

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Design and Implementation of A32-Bit RISC-V Processor for Efficient Arithmetic and Logic Processing

  • P. Rajeswari,
  • Smitha Sasi,
  • Aditi Kushwaha,
  • Darshit Singh Chouhan,
  • Arpit Shervegar,
  • Khushal Rander

摘要

This paper presents the design and implementation of a 32-bit RISC-V processor capable of executing fundamental arithmetic and logic operations. The processor includes an Arithmetic and Logic Unit (ALU), a register file, an Instruction Fetch Unit (IFU), and a control unit that generates control signals based on decoded opcode, funct7, and funct3 fields. The ALU performs essential operations, while the register file supplies operands and stores results. The processor executes core R-type instructions, facilitating real-time processing with zero-flag indication for conditional operations. The design was verified using Xilinx Vivado simulations, confirming its functionality. This work demonstrates a practical RISC-V processor design, contributing valuable insights for embedded systems development and educational purposes.