With the scale of pulse forming network expanding and the number of power modules increasing, a time sequence signal generator is limited by the number of channels, which shows the disadvantages in different application scenarios. To solve the problem of limited channel number of a signal generator, an expansion scheme is designed by adding another device to the existing generator, which realizes the cascade expansion of two signal generators and increases the maximum number of available channels. Aiming at the consistency of the integrated control and parameter setting of the two signal generators, the host computer software is developed with Qt Creator, two serial communication channels are set up to connect with the two sub-computer devices, and the output signals of the two devices are managed and controlled comprehensively. Aiming at the localization replacement of core components of time sequence signal generator, one of the devices uses domestic FPGA as the main control chip to complete the time sequence logic control design. Under the unified control of the host computer, the two time sequence signal generators can output the time sequence pulse signals according to the set parameters. When receiving software trigger signals from the host computer, the synchronization error between two devices is approximately 840 microseconds. However, establishing a hardware connection between the two devices significantly reduces this synchronization error to 20 ns when transmitting external trigger inputs from one device to another. This enhancement effectively facilitates cascading expansion of the two devices. For the discharge control of pulse forming network, the channel combinations of time sequence signal generator can be flexibly selected according to the number of power modules to ensure the normal operation of the system.

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Design of a Cascadable Time Sequence Signal Generator with Expandable Channels

  • Weiwei Pan,
  • Kun Liu,
  • Hengyu Lv,
  • Rongyao Fu,
  • Yaohong Sun

摘要

With the scale of pulse forming network expanding and the number of power modules increasing, a time sequence signal generator is limited by the number of channels, which shows the disadvantages in different application scenarios. To solve the problem of limited channel number of a signal generator, an expansion scheme is designed by adding another device to the existing generator, which realizes the cascade expansion of two signal generators and increases the maximum number of available channels. Aiming at the consistency of the integrated control and parameter setting of the two signal generators, the host computer software is developed with Qt Creator, two serial communication channels are set up to connect with the two sub-computer devices, and the output signals of the two devices are managed and controlled comprehensively. Aiming at the localization replacement of core components of time sequence signal generator, one of the devices uses domestic FPGA as the main control chip to complete the time sequence logic control design. Under the unified control of the host computer, the two time sequence signal generators can output the time sequence pulse signals according to the set parameters. When receiving software trigger signals from the host computer, the synchronization error between two devices is approximately 840 microseconds. However, establishing a hardware connection between the two devices significantly reduces this synchronization error to 20 ns when transmitting external trigger inputs from one device to another. This enhancement effectively facilitates cascading expansion of the two devices. For the discharge control of pulse forming network, the channel combinations of time sequence signal generator can be flexibly selected according to the number of power modules to ensure the normal operation of the system.