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The standard IBIS (I/O Buffer Information Specification) model is limited by its voltage range, which cannot accurately and efficiently describe the chip-side response under large input electromagnetic conduction pulses. This paper proposes a transient impulse response behavior modeling method for IC I/O ports based on the extension of the IBIS model, which extends the range of the I/V characteristics in the IBIS model by injecting higher-level TLP (Transmission Line Pulse) pulses to enable the behavioral simulation under high-current-voltage transient pulses. The consistency between simulation and measurement is achieved under TLP pulses, and the accuracy of the extended IBIS model is verified under the excitation of EFT (Electrical Fast Transient) pulses.

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Modeling Transient Impulse Response Behavior of IC I/O Ports Based on IBIS Model Extension

  • 会议论文

  • 发表日期：

    2025年

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  • Ting Zhang,
  • Yang Zhao,
  • Jian-Fang Dang,
  • Shuo-Jie Li,
  • Bao-Cheng Huang,
  • Wei-Dong Zhang,
  • Guang-Xiao Luo

摘要

The standard IBIS (I/O Buffer Information Specification) model is limited by its voltage range, which cannot accurately and efficiently describe the chip-side response under large input electromagnetic conduction pulses. This paper proposes a transient impulse response behavior modeling method for IC I/O ports based on the extension of the IBIS model, which extends the range of the I/V characteristics in the IBIS model by injecting higher-level TLP (Transmission Line Pulse) pulses to enable the behavioral simulation under high-current-voltage transient pulses. The consistency between simulation and measurement is achieved under TLP pulses, and the accuracy of the extended IBIS model is verified under the excitation of EFT (Electrical Fast Transient) pulses.