The rapid expansion of large-scale computing systems, including those focused on IoT security, necessitates the development of high-speed, low-power hardware platforms for post-quantum cryptography (PQC) to meet stringent security and data protection requirements. However, current research on PQC software and hardware accelerators continues to encounter issues with limited performance and excessive power consumption. Therefore, this paper introduces the Octa-core SPHINCS+ Accelerator (OSA), designed to optimize both processing speed and power efficiency for SPHINCS+-SHA-256 operations. OSA employs two major optimizations: optimal OSA memory organization for multiple instances and long message processing support and a SHA-256 octa-core to accelerate WOTS+ procedures. Evaluation conducted on the Xilinx ZCU102 FPGA shows that OSA achieves signing speeds that are 7.34 to 521 times faster than existing FPGA-based implementations. Additionally, compared to baseline designs, OSA reduces signing latency by 83.2%, increases signing speed by 4.7 to 5.95 times, and improves the power delay product (PDP) by 5.95 to 8.6 times. Real-time comparisons further highlight OSA’s superior performance, outperforming high-end CPUs with speeds 2.19 to 7.61 times faster and significantly enhancing power efficiency, achieving a PDP improvement of 17.46 to 45.17 times.