This chapter provides a comprehensive examination of moisture-induced reliability challenges in semiconductor packaging. As advanced technologies, such as 2.5D/3D integration, hybrid bonding, wafer- and panel-level packaging, chip stacking, fan-out, package-on-package (PoP), system-in-package (SiP), chiplets, and heterogeneous integration, continue to evolve, addressing moisture-related issues has become increasingly critical to ensuring reliability. The chapter analyzes the effects of moisture on mechanical properties, interfacial adhesion, and thermal and electrical performance. Industry-standard tests, including Moisture Sensitivity Test, unbiased and biased Highly Accelerated Stress Tests (HAST), and bake requirements, are reviewed. Key failure mechanisms such as popcorn cracking, delamination, and electrochemical migration (ECM), including dendritic growth and conductive anodic filament (CAF) formation, are analyzed. Two case studies provide practical insights: the first evaluates underfill material selection and interfacial adhesion at elevated temperatures, while the second examines stacked-die CSP package design, focusing on substrate design and reflow profile optimization. The chapter also introduces advanced moisture diffusion and vapor pressure modeling methodologies, including water activity theory and novel normalization approaches. Non-Fickian diffusion models, such as dual-stage and diffusion-convection models, are also discussed.