Scholarlink

In this chapter, the recent advances and trends in advanced substrates for high-performance computing (HPC) applications driven by artificial intelligence (AI) are presented. Emphasis is placed on the design, materials, process, fabrication, and reliability of advanced substrates for such as 2D IC integration, 2.1D IC integration, 2.3D IC integration, 2.5D IC integration or CoWoS (chip-on-wafer-on-substrate), CoWoS-L [LSI (local silicon interconnect)], 3D IC integration, 3.3D IC integration, 3.5D IC integration, silicon bridge, UCIe (universal chiplet interconnect express), fan-out, glass-core, and co-packaged optics (CPO). Some recommendations will be provided.

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Advanced Substrates for Chiplet and Heterogeneous Integration

  • 章节

  • 发表日期：

    2025年

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  • John Lau,
  • Xuejun Fan

摘要

In this chapter, the recent advances and trends in advanced substrates for high-performance computing (HPC) applications driven by artificial intelligence (AI) are presented. Emphasis is placed on the design, materials, process, fabrication, and reliability of advanced substrates for such as 2D IC integration, 2.1D IC integration, 2.3D IC integration, 2.5D IC integration or CoWoS (chip-on-wafer-on-substrate), CoWoS-L [LSI (local silicon interconnect)], 3D IC integration, 3.3D IC integration, 3.5D IC integration, silicon bridge, UCIe (universal chiplet interconnect express), fan-out, glass-core, and co-packaged optics (CPO). Some recommendations will be provided.