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This work presents a fully custom design of a 1 KB CMOS Pseudo-Static Random Access Memory (PSRAM). The PSRAM architecture incorporates a refresh control unit to maintain data integrity in the memory cells while minimizing power consumption. Unlike traditional DRAMs, the PSRAM employs a non-multiplexed address scheme, enabling a simpler interface and faster access times. The PSRAM design and simulation were conducted using ModelSim and Synopsis tools. The post-layout simulation results validated the pre-layout design, ensuring accurate circuit behavior. By combining the high-speed characteristics of SRAM with the low-power advantages of DRAM, the PSRAM offers a compelling solution for various embedded systems.

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Full Custom Design of an Advanced Low Power PSRAM

  • 会议论文

  • 发表日期：

    2025年

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  • P. Kushal,
  • M. P. Shwetha,
  • M. Hemantha,
  • P. R. Chitra

摘要

This work presents a fully custom design of a 1 KB CMOS Pseudo-Static Random Access Memory (PSRAM). The PSRAM architecture incorporates a refresh control unit to maintain data integrity in the memory cells while minimizing power consumption. Unlike traditional DRAMs, the PSRAM employs a non-multiplexed address scheme, enabling a simpler interface and faster access times. The PSRAM design and simulation were conducted using ModelSim and Synopsis tools. The post-layout simulation results validated the pre-layout design, ensuring accurate circuit behavior. By combining the high-speed characteristics of SRAM with the low-power advantages of DRAM, the PSRAM offers a compelling solution for various embedded systems.