Out of all the areas in current 5G research, the Non-Orthogonal Multiple Access (NOMA) technology plays a central role. Out of all the techniques of NOMA, the Sparse Code Multiple Access (SCMA) seems to hold the greatest promise for the elevation of the capacity of next-generation communication systems to support multiple users efficiently. At the heart of the SCMA lies the design and optimization of codebooks, which serves as a very crucial factor in determining the effectiveness of multiple access schemes. This paper proposes a new approach, the Altera FPGA board’s hardware implementation of the SCMA codebook. The codebook used is of the chaotic interleaved type to make SCMA more efficient and robust. Specifically, Arnold’s cat map is used as the method for interleaving, which decreases computational complexity (by reducing mathematical operations such as division and multiplication operations) to a huge extent without affecting performance. The code for the SCMA codebook is being developed within the Quartus II package v.13, where the minute details of the SCMA codebook are taken into consideration. Its hardware realization is being done on an Altera Cyclone V kit. The codebook generation is tested experimentally using the interactive switches and LEDs on the FPGA board, which justifies that it is working as per theoretical expectations.