The foundation of IGZO thin film transistor construction is that it requires low single-layer film stress, low wafer warpage and low hydrogen (H) content in the stacked structure. This work is to deposit SiO2/SiN stacked on 12-inch wafers based on the PECVD deposition machine, the stacked structure scheme of SiO2 (Xnm)/SiN (Xnm) was explored to reduce the film stress, wafer warpage and H content of the film. SiO2/SiN film layers prepared by PECVD SiO2 and PECVD SiN deposition tools, and the SiO2/SiN stacked structure was built alternately. Compared with the stacked structure constructed by SiO2/SiN standard PECVD deposition tools, The stress of SiN film decreases from 307 Mpa to ~250 MPa, and the stress of SiO2 film decreases from −354 MPa to −250 MPa, and the stress gap between the single-layer films decreases significantly, making the warping of the layers offset each other. At the same time, the H content in SiN is reduced from 21% to about 6%, which meets the requirements of IGZO thin film transistors for SiO2/SiN stack. 800/900 °C RTP treatment was applied to the stacked structure deposited by PECVD at SiO2 and SiN, which improved the slight bending of ~3° in the suspended monolayer film after lateral etch, and the uneven etching between monolayer films due to surface nitriding treatment. By separately controlling and optimizing the SiO2/SiN thin film stacked structure, the film stress, wafer warpage and H content of the stacked structure are effectively reduced, and the etch profile is improved by RTP treatment, providing data support for multi-layer film stacking with low stress and low H content.

错误:搜索内容不能为空,请输入英文关键词
错误:关键词超出字数限制,请精简
高级检索

Research and Fabricate of SiO2/SiN Stacked Structure with Low Hydrogen Content and Low Stress

  • Xin Zhang,
  • Tielu Liu,
  • Chao Tian,
  • Chao Zhao

摘要

The foundation of IGZO thin film transistor construction is that it requires low single-layer film stress, low wafer warpage and low hydrogen (H) content in the stacked structure. This work is to deposit SiO2/SiN stacked on 12-inch wafers based on the PECVD deposition machine, the stacked structure scheme of SiO2 (Xnm)/SiN (Xnm) was explored to reduce the film stress, wafer warpage and H content of the film. SiO2/SiN film layers prepared by PECVD SiO2 and PECVD SiN deposition tools, and the SiO2/SiN stacked structure was built alternately. Compared with the stacked structure constructed by SiO2/SiN standard PECVD deposition tools, The stress of SiN film decreases from 307 Mpa to ~250 MPa, and the stress of SiO2 film decreases from −354 MPa to −250 MPa, and the stress gap between the single-layer films decreases significantly, making the warping of the layers offset each other. At the same time, the H content in SiN is reduced from 21% to about 6%, which meets the requirements of IGZO thin film transistors for SiO2/SiN stack. 800/900 °C RTP treatment was applied to the stacked structure deposited by PECVD at SiO2 and SiN, which improved the slight bending of ~3° in the suspended monolayer film after lateral etch, and the uneven etching between monolayer films due to surface nitriding treatment. By separately controlling and optimizing the SiO2/SiN thin film stacked structure, the film stress, wafer warpage and H content of the stacked structure are effectively reduced, and the etch profile is improved by RTP treatment, providing data support for multi-layer film stacking with low stress and low H content.