Design Current Transconductance Analysis of DG-TFET for Inverter Applications
摘要
In this article, the study looks at double gate tunnel field-effect transistors (TFETs) as a possible device to provide improved electrical performances and steeper switching on low-power operation. Recommended device must have dielectric material and interfaces to reduce sub threshold leakage conventional in order to be approved for low-power applications. The device's verified results for the low IOFF current (IOFF = 4.17 × 10−17 A/μm), high ION current (ION = 2.27 × 10–6 A/μm), sub threshold slope, and current ratio (ION/IOFF) are in an order of 1011 and show SS effective results with values of 36.60 mV/decade, 30 nm channel length with a 6 nm Ge-Si layer, according to 3D SILVACO TCAD tool. Because new double gate tunnel-FET operates on a different principle than the conventional lateral TFET (LTFET) and has a low IOFF current and sub threshold slope or swing (S), the current study focuses on low-power digital circuit applications.