The traditional single-stage boostable inverter based on Z-source conversion is able to realize the boost function while completing the inversion. However, its boosting capability is limited by the structure of the topology itself, and the phenomenon of inverse modulation of the modulation factor is prone to occur when the duty cycle is high. This paper proposes a TΓ hybrid single-stage boostable inverter (TΓ-ZSI) with a special impedance network structure evolved from an integration of T-type and Γ-type impedance networks. In contrast to the classical Z-source inverter topology, the TΓ-ZSI achieve high boost multiple with smaller through duty cycle and larger modulation factor. In addition, the turns ratio is more flexible and the input current is well distributed. In this paper, the operating mode of TΓ-ZSI is analyzed, and each energy conversion relationship and voltage gain within the circuit are derived. A 1000 W prototype is designed to test the relevant performance of the proposed topology.

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A TΓ Hybrid Z Source Inverter

  • Leilei Zhao,
  • Shan Wang,
  • Haitao Hu,
  • Wei Mu

摘要

The traditional single-stage boostable inverter based on Z-source conversion is able to realize the boost function while completing the inversion. However, its boosting capability is limited by the structure of the topology itself, and the phenomenon of inverse modulation of the modulation factor is prone to occur when the duty cycle is high. This paper proposes a TΓ hybrid single-stage boostable inverter (TΓ-ZSI) with a special impedance network structure evolved from an integration of T-type and Γ-type impedance networks. In contrast to the classical Z-source inverter topology, the TΓ-ZSI achieve high boost multiple with smaller through duty cycle and larger modulation factor. In addition, the turns ratio is more flexible and the input current is well distributed. In this paper, the operating mode of TΓ-ZSI is analyzed, and each energy conversion relationship and voltage gain within the circuit are derived. A 1000 W prototype is designed to test the relevant performance of the proposed topology.