Paralleling SiC MOSFETs has become a popular solution for higher-power applications due to the limited current capability of SiC chips. However, most of the multi-chip SiC power modules are based on traditional single-sided wire-bonded packaging technologies, which limits both thermal and electrical performance. Double-sided cooling (DSC) structure features better thermal performance and lower parasitic inductance. However, the number of paralleled chips integrated in one DSC module is limited due to the packaging fabrication technologies and 3-D structure. Thus, the parallel connection of multiple DSC modules is the solution for high-power applications. This paper aims to propose an optimized method of paralleled DSC power modules for balanced current performance and stable gate-source voltage. So, a new DSC power module and optimized busbar structure are proposed, and the single drive scheme is selected for balanced current sharing of paralleled modules. The main factors influencing gate-source voltage oscillation are obtained, and a cost-effective method is proposed to suppress the voltage oscillation. Based on the discoveries, an 800 V/600 A double pulse test for three paralleled DSC modules is built up in LTspice and the simulation results verify the excellent electrical performance of the whole system.