This paper presents simulation and comparison of double-tail dynamic comparators (DTDC) based on complementary metal oxide semiconductors (CMOS), graphene nanoribbon field effect transistor (GNRFET), and carbon nanotube field effect transistors (CNTFETs). The DTDC has been designed using a 32 nm technology node using all three device technologies. Various parameters, such as rise time, output voltage, fall time, duty cycle, average power, slew rate, and area, have been simulated and analyzed. Based on simulation studies, comparators based on CNTFETs work efficiently in terms of power consumption, yield greater speeds, and offer output that is close to the supply rails. Furthermore, an extensive amount of research has been done to investigate the temperature effect on frequency and power of the proposed DTDC. Simulation studies demonstrate that comparators based on CNTFETs and GNRFETs provide insensitive behavior to variation in temperatures. Thus, the most promising options are GNRFETs and CNTFETs for future nanoelectronics devices.