DPAPC: Deterministic Process-Aware Partitioned Cache for Real-Time Systems
摘要
For real-time systems, the worst-case execution time analysis has a loose bound due to the non-deterministic nature of the memory subsystem. To have a tighter bound on worst-case execution time analysis, this work proposes a Deterministic Process Aware Partitioned Cache (DPAPC), a deterministic real-time memory subsystem. This work designed deterministic TLB (DTLB) and, deterministic L1 Cache. When the worst-case execution time of the job is known, DTLB guarantees a tighter upper bound. The DPAPC ensures a deterministic tighter upper bound by reserving K ways on pre-emption. Experimental analysis conducted using SPLASH2 benchmark suit on CACTI6.5 time and energy values with MemSim is a simulator that runs on a single clock cycle developed in Java revealing that DPAPC offers an increase in hit rate with reduced access time and energy consumption. On average DPAPC offers a 0.55% increase in hit rate, a 3.63% reduction in access time, 30.75% reduction in dynamic energy over the conventional cache. Over conventional cache, it has an increase of 16.98% static energy for varying numbers of pre-emption.