FPGA-Based Implementation of an RBF-PID Neural Network for Adaptive Parameter Tuning

In this paper, we propose a radial basis function proportional-integral-derivative (RBF-PID) neural network architecture that can be deployed on Xilinx Field-Programmable Gate Array (FPGA) devices. The RBF-PID neural network structure enables adaptive tuning of PID parameters. Unlike traditional RBF methods, where the output layer produces a single output through linear combination and subsequently adjusts PID parameters using Jacobian matrix identification, our approach directly configures the output layer to generate the PID parameters as outputs, making the system more concise and efficient. Furthermore, we have accomplished the FPGA hardware deployment of the RBF-PID neural network. By designing dedicated pipeline modules to implement Gaussian radial basis function approximations, experimental verification demonstrates that the system achieves Q12 precision, successfully addressing the longstanding challenge of insufficient accuracy in hardware implementations of RBF neural networks.