Optimized Fifteen-Level Cascaded H-Bridge Inverter: Switch Reduction Strategies and THD Mitigation via SPWM Technique
摘要
Multilevel Inverters (MLIs) have become popular in high potential and high force applications due to their advantages over conventional inverters. MLIs have less filtering demands, a lower rate of change of potential with time, and better performance in terms of Electromagnetic Interference (EMI) and Electromagnetic Compatibility (EMC). The basic or conventional 15-level inverter uses twenty-eight switches to give the output, and thus has high switching losses and a lower frequency. The above problems are overcome in our proposed circuit in this research work. The multilevel inverter proposed in this research work gives an output voltage of 15 levels by using a reduced number of switches and is driven by different PWM techniques. The 15-level MLI proposed in our research can produce 15 levels from the supply voltage given to the inverter. To achieve the desired 15-level output using different PWM techniques, including the sinusoidal PWM, phase disposition PWM, and the multi-carrier PWM techniques, is considered. A comparative study is made between these techniques to determine the best and most efficient method. The distortion of all harmonics is brought down to a standard value. The switching frequency and switching losses are computed for the suggested circuit. Using the most dependable and efficient PWM technique, a hardware prototype of the suggested circuit is examined following a comparison analysis from simulation.